Static information storage and retrieval – Floating gate – Multiple values
Patent
1996-09-12
1998-11-03
Zarabian, A.
Static information storage and retrieval
Floating gate
Multiple values
36518523, G11C 1134
Patent
active
058319000
ABSTRACT:
A nonvolatile semiconductor memory device includes nonvolatile memory cells (C), constant voltage circuits for applying one of different verify voltages to control gates of the nonvolatile memory cells C in response to control data introduced into the memory device from the exterior, and writing and sensing circuit circuits for applying a potential to drains of the nonvolatile memory cells C in response to write data introduced into the memory device and for detecting and amplifying currents between drains and sources of the nonvolatile memory cells By dividing the memory cell array 501 and a serial register 502 into some parts and by connecting an external SRAM 503 so as to progress the transfer of data from the memory cell array 501 to the serial register 502 and the transfer of data from the serial register 502 to the external SRAM 503 in parallel, the read speed is increased.
REFERENCES:
patent: 5214605 (1993-05-01), Lim
patent: 5278790 (1994-01-01), Kanabara
patent: 5371705 (1994-12-01), Nakayama
patent: 5388084 (1995-02-01), Itoh
patent: 5428568 (1995-06-01), Kobayashi
Kabushiki Kaisha Toshiba
Zarabian A.
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