Nonvolatile memory with multi-frequency charge pump control

Details Nonvolatile memory with multi-frequency charge pump control Nonvolatile memory with multi-frequency charge pump control

2007-07-31

2007-07-31

Ho, Hoai V. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S189110, C365S233100

Reexamination Certificate

active

11115132

ABSTRACT:
The present invention is directed to largely reduce peak current at the time of operation of a boosting circuit provided for an EEPROM. In the erase/write operation, first, a low-frequency clock signal as a selection clock signal is input by a low-frequency clock control signal to a charge pump. After lapse of a certain period (about ⅓ of fall time), a high-frequency clock signal having a frequency higher than that of the low-frequency clock signal is output by a high-frequency clock control signal and is input as the selection clock signal to the charge pump to boost a voltage to a predetermined voltage level. In such a manner, while suppressing the peak of consumption current, the fall time of the boosted voltage can be shortened.

REFERENCES:
patent: 5881012 (1999-03-01), Kawasaki et al.
patent: 6560145 (2003-05-01), Martines et al.
patent: 6567313 (2003-05-01), Tanaka et al.
patent: 6791884 (2004-09-01), Matsuda et al.
patent: 2002-109894 (2002-04-01), None
patent: WO 02/19342 (2002-03-01), None

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