Nonvolatile memory utilizing MIS memory transistors with bit...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185230, C365S189080

Reexamination Certificate

active

07460400

ABSTRACT:
A nonvolatile semiconductor memory device includes a plurality of control lines, a control circuit configured to assert selected ones of the control lines, and a plurality of memory cell arranged in rows and columns and including respective latch circuits and respective nonvolatile memory cells, wherein the memory cell units are configured to perform a write operation in which the latch circuits of the memory cell units on a selected row store respective bits of the input data, and are further configured to perform a store operation in which the respective bits of the input data are transferred from the latch circuits to the nonvolatile memory cells for storage therein in response to assertion of respective control lines by the control circuit, so that only one or more selective bits of the input data selected by the control circuit are stored in the nonvolatile memory cells.

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