Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1975-08-28
1978-02-28
Miller, Jr., Stanley D.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
357 30, 357 41, 357 54, 357 59, 307238, H01L 2978
Patent
active
040770443
ABSTRACT:
Disclosed is a field-effect transistor device which is capable of storing pieces of analogue information in the form of charge stored in a charge-storing means. A memory device according to this invention comprises, drain and source regions in a semi-conductor substrate, an insulating layer lying on the major surface of the substrate and an elongated resistive gate region lying on the insulating layer between the drain and source regions and having two electrodes provided on the opposite ends of the gate region. When a voltage below the critical voltage of charge injection is applied to one of the electrodes whereas a voltage above the critical voltage and representative of analogue information is applied to the other electrode, the area of charge injection in the charge-storing mechanism of the insulating layer varies with the latter "writing" voltage, thus realizing the storage of analogue information if said area is filled with electric charge. The piece of analogue information thus stored is read in terms of source-to-drain current.
REFERENCES:
patent: 3657614 (1972-04-01), Cricchi
patent: 3714522 (1973-01-01), Komiya et al.
patent: 3728695 (1973-04-01), Frohman-Bentchkowsky
patent: 3745426 (1973-07-01), Olmstead
patent: 3755721 (1973-08-01), Frohman-Bentchkowsky
patent: 3774087 (1973-11-01), Pepper
patent: 3825945 (1974-07-01), Masuoka
patent: 3825946 (1974-07-01), Frohman-Bentchkowsky
patent: 3829881 (1974-08-01), Kohashi
patent: 3906296 (1975-09-01), Maserjian et al.
patent: 3916430 (1975-10-01), Heuner et al.
Electronics-"Electronics International-Japan," Oct. 26, 1970.
F. Hochberg, "FET Gate Structure," IBM Tech. Discl. Bull., vol. 8, No. 5, Oct. 1965, p. 813.
B. Agusta et al., "Nonvolatile Imaging Devices," IBM Tech. Discl. Bull., vol. 15, No. 9, Feb. 1973, p. 2821.
J. Elliott et al., "Self-Limiting Off-Chip Driver," IBM Tech. Discl. Bull., vol. 16, No. 8, Jan. 1974, pp. 2679-2680.
C. Hu et al., "A Resistive-Gated IGFET Tetrope," IEEE Trans, On Elec. Dev., vol. Ed-18, No. 7, July 1971, pp. 418-425.
A. Tickle et al., "Electrically Alterable Non-Volatile Semiconductor Memory Tech., " 1972 Wescon Tech. Papers, vol. 16, Sept. 19-22, 1972, pp. 1-8.
Agency of Industrial Science & Technology
Clawson Jr. Joseph E.
Miller, Jr. Stanley D.
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