Nonvolatile memory protection

Static information storage and retrieval – Powering – Data preservation

Patent

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Details

365229, 36518901, G11C 0000

Patent

active

050016709

ABSTRACT:
A nonvolatile memory protection system for a microprocessor system having a common address bus, to which a nonvolatile memory is connected, interposes a controller connected to the common address bus between the commands generated by the microprocessor and the nonvolatile memory. The controller generates valid commands for the nonvolatile memory upon receiving a predetermined sequence of commands from the microprocessor, disabling the nonvolatile memory in the absence of valid commands. A power protect circuit connected between the microprocessor system power supply and the nonvolatile memory provides a disable signal to the nonvolatile memory during power up and power down of the microprocessor system.

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patent: 4610003 (1986-09-01), Natori
patent: 4612632 (1986-09-01), Olson
patent: 4631707 (1986-12-01), Watanabe
patent: 4638465 (1987-01-01), Rosini et al.
patent: 4672585 (1987-06-01), Nollet

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