Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2005-06-21
2005-06-21
Nguyen, Tan T. (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S204000
Reexamination Certificate
active
06909639
ABSTRACT:
The problem of bit disturb is reduced by discharging the floating bit lines of a nonvolatile memory array during programming. An illustrative virtual ground memory array uses single transistor floating gate type memory cells that are programmed using Fowler-Nordheim (“FN”) tunneling, highly conductive and lengthy bit lines, buried and relatively short sub-bit lines and a programming discharge circuit for controlling spurious voltages on the bit lines that can arise when some of the bit lines are left floating during programming. Discharge control transistor respectively coupled to the bit lines direct current into a discharge section. A discharge section may be provided for each bit line, or shared by all bit lines. The discharge section may be a fixed circuit section for use through the programming process or may be selected from multiple discharge options.
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Han Kyung Joon
Lee Poongyeub
Park Eungjoon
Park Joo Weon
Altera Law Group LLC
NexFlash Technologies, Inc.
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