Nonvolatile memory for trapping electrons in selected cells duri

Details Nonvolatile memory for trapping electrons in selected cells duri Nonvolatile memory for trapping electrons in selected cells duri

1996-11-25

1998-09-15

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

365194, G11C 1134

Patent

active

058089365

ABSTRACT:
A nonvolatile memory includes a matrix array of nonvolatile memory cells arranged in rows and columns, ones of the memory cells arranged in rows being connected to word lines and ones of the memory cells arranged in columns being connected to bit lines. A selection logic circuitry receives programming data and produces a row selection signal and a column selection signal. A row decoder is responsive to the row selection signal for selecting one of the word lines, and a column decoder is responsive to the column selection signal for selecting at least one of the bit lines. When the nonvolatile memory is programmed, the programming data is supplied to the selection logic circuitry, and a write-in voltage is supplied to the row decoder for a period that is inversely variable with the write-in voltage so that hot electrons are trapped in the memory cell which is connected to the selected bit line as well as to the selected word line.

REFERENCES:
patent: 4267603 (1981-05-01), Osakabe et al.
patent: 5623444 (1997-04-01), Gotou et al.

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