Nonvolatile memory device having a plurality of memory blocks

Details Nonvolatile memory device having a plurality of memory blocks Nonvolatile memory device having a plurality of memory blocks

2008-07-21

2010-10-05

Le, Vu A (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S226000

Reexamination Certificate

active

07808808

ABSTRACT:
A nonvolatile memory device1capable of preventing interference between a read operation and a rewrite operation, and capable of preventing malfunctions that may occur in the event the read operation and the rewrite operation are performed simultaneously between memory blocks is provided. The nonvolatile memory device1is provided with a plurality of banks, a rewrite control unit2to which a first power source line VCC1and a first ground line VSS1are connected and which is adapted to control a rewrite operation with respect to a bank i, and a read control unit5to which a second power source line VCC2and a second ground line VSS2are connected and which is adapted to control a read operation with respect to a bank j, wherein the rewrite control unit2and the read control unit5are arranged so as to be spaced from each another.

REFERENCES:
patent: 6515908 (2003-02-01), Miyawaki et al.
patent: 2003/0218217 (2003-11-01), Saito
patent: 2004/0062115 (2004-04-01), Takeuchi et al.

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