Nonvolatile memory device and method of operating the same

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S230060, C365S189040, C365S189090, C365S189080

Reexamination Certificate

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07898866

ABSTRACT:
A nonvolatile memory device includes a first plane and a second plane, an address decoder configured to decode an externally input address and to output a first plane select signal and a second plane select signal for enabling any one of the first and second planes, a controller configured to output a first plane hold signal and a second plane hold signal for disabling any one of the first and second planes depending on program states of the first plane and the second plane, a first plane control unit configured to enable the first plane in response to a first plane select signal and the first plane hold signal, and a second plane control unit configured to enable the second plane in response to a second plane select signal and the second plane hold signal.

REFERENCES:
patent: 2006/0268654 (2006-11-01), Chae et al.
patent: 1020080056586 (2008-06-01), None
Notice of Allowance issued from Korean Intellectual Property Office on May 31, 2010.

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