Active solid-state devices (e.g. – transistors – solid-state diode – Tunneling pn junction device – Reverse bias tunneling structure
Patent
1990-09-27
1992-11-10
Mintel, William
Active solid-state devices (e.g., transistors, solid-state diode
Tunneling pn junction device
Reverse bias tunneling structure
365185, 257367, 257314, H01L 2968, H01L 2934, G11C 1134
Patent
active
051628805
ABSTRACT:
A nonvolatile memory cell comprises a semiconductor substrate of first conduction type, a high-concentration impurity region of second conduction type formed on the semiconductor substrate and connected to a bit line, an insulation film in which carrier traps are formed, and a gate electrode that is opposite the high-concentration impurity region across the insulation film and connected to a word line. Carriers are captured by, and released from, the carrier traps formed in the insulation film, in response to bias voltages applied to the word and bit lines. Information stored in the memory cell depends on whether or not the carrier traps are holding carriers. The information is read out of the memory cell as the difference of a tunneling current flowing between the semiconductor substrate and the high-concentration impurity region.
REFERENCES:
patent: 3805130 (1974-04-01), Yamazaki
patent: 4047974 (1977-09-01), Harari
patent: 4173791 (1979-11-01), Bell
Hazama Hiroaki
Nishinohara Kazumi
Kabushiki Kaisha Toshiba
Limanek Robert
Mintel William
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