Static information storage and retrieval – Interconnection arrangements – Ferroelectric
Patent
1993-10-27
1995-06-27
Popek, Joseph A.
Static information storage and retrieval
Interconnection arrangements
Ferroelectric
365 51, 365 52, 365148, 365182, 36518901, 365226, 365227, 365900, 36523003, G11C 506, G11C 1606
Patent
active
054285666
ABSTRACT:
A memory card includes a plurality of nonvolatile memories, each having a pad for applying a busy signal indicating that a respective memory is busy and a circuit for coupling the busy signal to the pad. The pad of each memory is coupled to a node external to the memories. A resistive circuit is used for coupling a first voltage to the node. When each of the memories does not output the busy signal at the pad, the node assumes a first voltage. When the pad of at least one of the memories outputs the busy signal, the node assumes a ground voltage. An output pin is used for supplying a card busy output signal when at least one of the memories is indicated busy and an input pin is coupled to the node for receiving the card busy output signal at the node. A pass logic is coupled to the input and output pins for passing the card busy output signal directly from the input pin to the output pin. Each of the memories also includes an input pad for receiving a global power down control signal and a register for receive a software power down control signal. A logic gate is used to allow either of the signals to pass.
REFERENCES:
patent: 4460982 (1984-07-01), Gee et al.
patent: 4763305 (1988-08-01), Kuo
patent: 5130947 (1992-07-01), Reed
patent: 5185869 (1993-02-01), Suzuki
patent: 5222046 (1993-06-01), Kreifels et al.
patent: 5224070 (1993-06-01), Fandrich et al.
patent: 5267218 (1993-11-01), Elbert
patent: 5301161 (1994-04-01), Landgraf et al.
patent: 5329491 (1994-07-01), Brown et al.
--Personal Computer Memory Card International Association PC Card Standard Release 2.0, pp. 1--1 through 4-34 (Sep. 1991).
Intel Corporation
Popek Joseph A.
Tran Andrew Q.
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