Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2008-05-13
2008-05-13
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185220, C365S189040, C365S191000
Reexamination Certificate
active
07372741
ABSTRACT:
A nonvolatile memory apparatus which includes plural memories one of which is a nonvolatile memory such as a Flash EEPROM capable of being specified a plurality of operations from a processing unit of the apparatus including an erase operation, the erase operation in the nonvolatile memory performs a threshold voltage moving operation and a verify operation, and the nonvolatile memory is capable of releasing the I/O bus during the erase operation to thereby allow accessing of other memories and/or system components. For example, during this erase operation, the Flash EEPROM is able to free the I/O data terminal such that the EEPROM becomes electrically isolated from the CPU. The CPU is then able to perform data processing by the system bus where information can then be transferred/received such as between other memories, e.g., ROM and RAM, and otherwise with the I/O port.
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Kubota Yasurou
Kume Hitoshi
Muto Tadashi
Seki Koichi
Shoji Kazuyoshi
Antonelli, Terry Stout & Kraus, LLP.
Hitachi ULSI Systems Co. Ltd.
Nguyen Vanthu
Renesas Technology Corp.
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