Nonvolatile memory apparatus

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S189110, C365S227000, C365S229000

Reexamination Certificate

active

11150144

ABSTRACT:
Current consumption in a nonvolatile memory apparatus operable on two or more different power voltages is to be substantially reduced in its standby mode. A stepped-down power supply unit provided in a flash memory to generate an internal power voltage, when supplied from outside with about 3.3 V as a power voltage, causes a first stepped-down power supply circuit to output the internal power voltage to control circuits when in normal operation. In a low power consumption mode, a second stepped-down power supply circuit outputs the internal power voltage to the control circuits, and in a standby mode a third stepped-down power supply circuit outputs to the control circuits an internal power voltage stepped down by an N-channel MOS transistor.

REFERENCES:
patent: 5804893 (1998-09-01), Fujioka
patent: 5811861 (1998-09-01), Nunokawa
patent: 5994950 (1999-11-01), Ochi
patent: 6385119 (2002-05-01), Kobayashi et al.
patent: 7023758 (2006-04-01), Hanson et al.
patent: 9-198151 (1997-07-01), None
patent: 10-74394 (1998-03-01), None
patent: 10-150152 (1998-06-01), None

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