Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
1998-09-18
2002-10-29
Jackson, Jr., Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S072000, C257S344000, C257S347000, C257S356000, C257S763000
Reexamination Certificate
active
06472684
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a nonvolatile memory using thin-film transistors that are formed by using the SOI (silicon on insulator) technology and, particularly, to an EEPROM (electrically erasable and programmable read-only memory) that is formed on an insulative substrate so as to be integral with its peripheral circuits such as a driver circuit. The term “silicon” as used above means a silicon single crystal or a silicon semiconductor that is substantially a single crystal.
2. Description of the Related Art
In recent years, the miniaturization of semiconductor devices have required memories that has high performance and large storage capacity and is small in size. Currently, among various storage devices for semiconductor devices, the magnetic disk and the semiconductor nonvolatile memory manufactured by using bulk silicon are used most frequently.
Although the magnetic disk is one of storage devices having the largest, storage capacity among those used for semiconductor devices, it has disadvantages of difficulty in miniaturization and slow write and read speeds.
On the other hand, although at present the semiconductor nonvolatile memory is lower in storage capacity than the magnetic disk, its read and write speeds are tens of times higher than the magnetic disk. Further, semiconductor nonvolatile memory products having sufficient performance also in the number of allowable rewrite operations and data holding time have been developed recently. This has caused a tendency of using a semiconductor memory as a replacement of a magnetic disk.
However, conventionally, the semiconductor nonvolatile memory is manufactured by using bulk silicon and accommodated in a package. Therefore, when such a semiconductor nonvolatile memory is mounted on a semiconductor device, the number of manufacturing steps increases and a large-sized package is an obstacle to miniaturization of the semiconductor device.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above circumstances, and an object of the invention is therefore to provide a nonvolatile memory which can be formed so as to be integral with other parts of a semiconductor device and allows its miniaturization.
To attain the above object, according to a first aspect of the invention, there is provided a nonvolatile memory in which memory cells each including a memory TFT and a switching TFT are arranged in matrix form, wherein the memory TFT comprises a semiconductor active layer formed on an insulative substrate, a gate insulating film, a floating gate electrode, an anodic oxide film formed by anodizing the floating gate electrode, and a control gate electrode; the switching TFT comprises a semiconductor active layer formed on the insulative substrate, a gate insulating film, and a gate electrode; and the memory TFT and the switching TFT are integrally formed on the insulative substrate, and the semiconductor active layer of the memory TFT is thinner than that of the switching TFT.
The semiconductor active layers of the memory TFT and the switching TFT may have a thickness of 150 nm or less.
The semiconductor active layers of the memory TFT and the switching TFT may have thicknesses of 1-50 nm and 40-100 nm, respectively.
The semiconductor active layer of the memory TFT may have a thickness of 10-40 nm.
The semiconductor active layer of the memory TFT may have such thickness that impact ionization occurs more easily than that of the switching TFT.
A tunnel current flowing through the semiconductor active layer of the memory TFT may be two times or more larger than that flowing through the semiconductor active layer of the switching TFT.
To attain the above object, according to a second aspect of the invention, there is provided a nonvolatile memory in which memory cells each including a memory TFT and a switching TFT are arranged in matrix form, wherein the memory TFT comprises a control gate electrode formed on an insulative substrate, a first insulating film, a floating gate electrode, a second insulating film, and a semiconductor active layer; the switching TFT comprises a gate electrode formed on the insulative substrate, a first insulating film, and a semiconductor active layer; and the memory TFT and the switching TFT are integrally formed on the insulative substrate, and the semiconductor active layer of the memory TFT is thinner than that of the switching TFT.
The semiconductor active layers of the memory TFT and the switching TFT may have a thickness of 150 nm or less.
The semiconductor active layers of the memory TFT and the switching TFT may have thicknesses of 1-50 nm and 40-100 nm, respectively.
The semiconductor active layer of the memory TFT may have a thickness of 10-40 nm.
The semiconductor active layer of the memory TFT Yr,ay have such thickness that impact ionization occurs more easily than that of the switching TFT.
A tunnel current flowing through the semiconductor active layer of the memory TFT may be two times or more larger than that flowing through the semiconductor active layer of the switching TFT.
To attain the above object, according to a third aspect of the invention, there is provided a manufacturing method of a nonvolatile memory, comprising the steps of forming first and second amorphous silicon films having different thicknesses; crystallizing the first and second amorphous silicon films into first and second crystalline silicon films having first and second thicknesses, respectively, the first thickness being smaller than the second thickness; and forming a memory TFT and a switching TFT on the first and second crystalline silicon films, respectively.
The first and second thicknesses may be 150 nm or less.
The first and second thicknesses may be 1-50 nm and 40-100 nm, respectively.
The first thickness may be 10-40 nm.
The first and second thicknesses may be so set that impact ionization occurs more easily in the first crystalline silicon film than in the second crystalline silicon film.
A tunnel current flowing through the semiconductor active layer of the memory TFT may be two times or more larger than that flowing through the second crystalline silicon film.
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Specifications and Drawings for Application Ser. No. 09/084/738, “Semiconductor Thin Film & Semiconductor Device”.
Hayashi Keisuke
Koyama Jun
Yamazaki Shunpei
Costellia Jeffrey L.
Jackson, Jr. Jerome
Nixon & Peabody LLP
Ortiz Edgardo
Semiconductor Energy Laboratories Co., Ltd.
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