Nonvolatile memory

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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Details

C365S185010, C365S185240, C365S185180, C365S185140

Reexamination Certificate

active

06205054

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a nonvolatile memory, and more particularly to a nonvolatile memory, such as EPROM or EEPROM, which is preferably used in applications which require a static readout operation (e.g., an application which requires static data output).
2. Description of the Related Art
Many conventional nonvolatile memories have employed a dynamic circuit for data readout operation, and therefore have suffered from a problem of high electric power consumption due to static current. Particularly, such nonvolatile memories consume a considerably large amount of electric power when a readout operation is performed continuously or data are output statically.
Some SRAMs employ six-transistor cells in order to decrease static current to 1 &mgr;A or less. However, conventional nonvolatile memories such as EPROMs and EEPROMs have had a drawback of large static current and therefore cannot be used in applications in which continuous a readout operation must be performed.
SUMMARY OF THE INVENTION
In view of the foregoing, an object of the present invention is to provide a nonvolatile memory which can maintain static current at a very low level even while in a readout state.
In order to achieve the above object, the present invention provides a nonvolatile memory comprising: paired memory elements each including a storage transistor having a control gate and a floating gate, in which, through a write operation, one of the storage transistors is brought into a depletion state and the other storage transistor is brought into an enhancement state; and connection means for serially connecting the paired memory elements during at least a readout operation, wherein an output signal is outputted from a connection line which connects the paired memory elements via the connection means.
Preferably, the connection means comprises switch means for serially connecting the paired memory elements during the readout operation.
Alternatively, the connection means comprises paired connection transistors, each of which shares at least the floating gate with the corresponding storage transistor and which are connected in series.
Preferably, each of the memory elements comprises a write transistor connected in series to the storage transistor.
In the nonvolatile memory according to the present invention, current other than leakage current does not flow during readout operation. Therefore, nonvolatile memories—which have conventionally consumed a large amount of electric power due to static current and therefore have been used in limited applications—can be applied to a broadened range of applications. Further, the nonvolatile memory of the present invention can be applied even to applications which require static data output.
In ordinary memory, since voltage written into a memory element is insatiable, a dedicated sense amplifier must be provided in order to stabilize the voltage. Further, the sense amplifier is operated during a readout operation only in order to reduce electric power consumed in the sense amplifier. In contrast, in the present invention, since the memory element itself outputs a memorized signal, such a sense amplifier is not required. This reduces consumption of electric power and simplifies the overall structure of a memory unit.


REFERENCES:
patent: 5604711 (1997-02-01), Cheung
patent: 5608670 (1997-03-01), Akaogi et al.
patent: 5751635 (1998-05-01), Wong et al.
patent: 5757696 (1998-05-01), Matsuo et al.
patent: 5912488 (1999-06-01), Kim et al.
patent: 353125736A (1978-11-01), None
patent: 403216896A (1991-09-01), None
patent: 410125071A (1998-05-01), None

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