Nonvolatile electrically alterable memory

Static information storage and retrieval – Floating gate – Particular biasing

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Details

365149, 365154, 365182, 357 45, G11C 1140

Patent

active

045997063

ABSTRACT:
A compact, floating gate, nonvolatile, electrically alterable memory device is fabricated with three layers of polysilicon. In a nonvolatile memory array, each cell is electrically isolated from other cells to eliminate data disturb conditions in nonaddressed cells of the memory array. The memory cell and array is described in a first embodiment as including four electrode layers, one of which being formed as a substrate coupling electrode. A second embodiment includes a three electrode layer device wherein the need for the substrate coupling electrode is eliminated.

REFERENCES:
patent: 4274012 (1981-06-01), Simko
patent: 4300212 (1981-11-01), Simko
patent: 4314265 (1982-02-01), Simko
patent: 4486769 (1984-12-01), Simko

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