Nonoverlapping phased, resettable, peak detector

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

Reexamination Certificate

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Details

C327S058000

Reexamination Certificate

active

06215335

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates in general to a peak detector, and more particularly to a resettable peak detector that generates a nonoverlapping phased output signals.
2. Description of Related Art
Today's wireless communications markets are being driven by a multitude of user benefits. Products such as cellular phones, cordless phones, pagers, and the like have freed corporate and individual users from their desks and homes and are driving the demand for additional equipment and systems to increase their utility. As a result digital radio personal communications devices will play an increasingly important role in the overall communications infrastructure in the next decade.
Mixed-signal integration and power management have taken on added importance now that analog and mixed analog-digital ICs have become the fastest-growing segment of the semiconductor industry. Integration strategies for multimedia consoles, cellular telephones and battery-powered portables are being developed, as well as applications for less integrated but highly specialized building blocks that serve multiple markets. These building blocks include data converters, comparators, demodulators, filters, amplifiers and voltage regulators.
One important aspect of digital radio personal communications devices is the integration of the RF sections of transceivers. Compared to other types of integrated circuits, the level of integration in the RF sections of transceivers is still relatively low. Considerations of power dissipation, low offset budgets, form factor, and cost dictate that the RF/IF portions of these devices evolve to higher levels of integration than is true at present. Nevertheless, there are some key barriers to realizing these higher levels of integration.
For example, there are many applications where it's necessary to provide an RF peak detector circuit in an RF receiver system to determine level and offset signal values. These values are used as the inputs in subsequent circuits. For peak detectors, nonoverlapping phased output signals and resettability are required to provide the proper signaling to subsequent circuitry. In some components, such as a demodulator, the bit error rates (BER) start to degrade for signal levels above and below predetermined levels. This is due to offsets within such components. As a result, resettable circuitry and reliable level and offset information is necessary to provide signals within a predetermined range and to eliminate transient voltages.
It can be seen then that there is a need for an peak detector to provide level and offset signaling. Specifically, a peak detector that is resettable and provides a nonoverlapping phased output to eliminate transient voltages.
SUMMARY OF THE INVENTION
To overcome the limitations in the prior art described above, and to overcome other limitations that will become apparent upon reading and understanding the present specification, the present invention discloses a peak detector, and more particularly to a resettable peak detector that generates a nonoverlapping phase output signals.
The present invention solves the above-described problems by providing a peak detector that is resettable and generates a nonoverlapping phased output signal that provides a level and an offset signal value used in subsequent circuitry.
A method in accordance with the principles of the present invention includes comparing an input signal to a first reference signal to produce a maximum sample signal when the input signal is greater than the first reference signal. Comparing the input signal to a second reference signal to produce a minimum sample signal when the input signal is less than the first reference signal. Further, sampling the input signal to activate a maximum sample signal when the input signal is greater than the first reference signal and to activate a minimum sample signal when the input signal is less than the second reference signal, thereto to produce a maximum output signal and a minimum output signal, respectively.
Other embodiments of a system in accordance with the principles of the invention may include alternative or optional additional aspects. One such aspect of the present invention includes retaining the input signal in a storage medium.
Another aspect of the present invention is that the storage medium further includes a sample and hold amplifier.
Another aspect of the present invention is that the input signal includes an in-phase and a quadrature input signal.
Another aspect of the present invention is that the input signal is stored as the first reference signal in a maximum sample and hold amplifier, when the input signal is greater than the first reference signal.
Another aspect of the present invention is that the input signal is stored as the second reference signal in a minimum sample and hold amplifier, when the input signal is less than the first reference signal.
Another aspect of the present invention is that the detector includes a reset signal.
Another aspect of the present invention is that the implementation of the reset signal further includes a maximum reference signal and a minimum reference signal.
Another aspect of the present invention is that the maximum reference signal and the minimum reference signal further includes a positive signal level for a maximum reference signal and a negative signal level for a minimum reference signal.
Another aspect of the present invention is that the implementation of the reset signal reduces transient signals in the maximum and the minimum output signals.
Another aspect of the present invention is that the maximum output signal and the minimum output signal provides a level and an offset signal.
Another aspect of the present invention is that the minimum and maximum sample signals are generated as a function of a comparator and a clock signal output.
Another aspect of the present invention is that the minimum and maximum sample signals provide a maximum nonoverlapping phased output signal and a minimum nonoverlapping phased output signal.
Another aspect of the present invention is that the clock signal further includes a voltage doubler that controls a sample and hold amplifier.
These and various other advantages and features of novelty which characterize the invention are pointed out with particularity in the claims annexed hereto and form a part hereof. However, for a better understanding of the invention, its advantages, and the objects obtained by its use, reference should be made to the drawings which form a further part hereof, and to accompanying descriptive matter, in which there are illustrated and described specific examples of an apparatus in accordance with the invention.


REFERENCES:
patent: 4698523 (1987-10-01), Gershon et al.
patent: 4859873 (1989-08-01), O'Shaughnessy et al.
patent: 5210527 (1993-05-01), Smith et al.
patent: 5331210 (1994-07-01), McCarroll

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