Noninterfering multiply-MAC (multiply accumulate) circuit

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Details

C708S523000

Reexamination Certificate

active

06957242

ABSTRACT:
A noninterfering multiply-MAC (multiply accumulate) circuit is described. The circuit is operational to perform a MAC (multiply accumulate) operation and to perform a multiply operation without interfering with the accumulate value of the MAC operation. The circuit includes a first register, a second register, a multiplier circuit, and an accumulate circuit. The first register is addressable using either a primary first address or an alias first address. Moreover, the second register is addressable using either a primary second address or an alias second address. The multiplier circuit performs a multiply operation to generate a product value based on the data in the first and second registers after a write operation to either the first register or the second register. The accumulate circuit performs an accumulate operation to generate an accumulate value if either the alias first address or the alias second address is used in the write operation.

REFERENCES:
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patent: 5202687 (1993-04-01), Distinti
patent: 5241492 (1993-08-01), Girardeau, Jr.
patent: 6144327 (2000-11-01), Distinti et al.
patent: 6269383 (2001-07-01), Sabin et al.
patent: 6421698 (2002-07-01), Hong
patent: 6483343 (2002-11-01), Faith et al.
patent: 6611856 (2003-08-01), Liao et al.

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