Non-volatile semiconductor storage apparatus

Static information storage and retrieval – Floating gate – Particular connection

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36518512, 36518516, 36518529, G11C 700

Patent

active

056711778

ABSTRACT:
A non-volatile semiconductor storage apparatus which incorporates second bit lines connected to the sources of memory cell transistors arranged in a column direction, formed separately from the layer of first bit lines connected to the drains of the memory cell transistors arranged in a column direction. The apparatus is equipped with a system which can erase data byte by byte without enlarging the whole size irrespective of the provision of decoders in the first and second bit lines. A non-volatile semiconductor storage apparatus which erases data byte by byte by selecting a predetermined group of memory cell transistors by the source lines and the word lines connected to the diffusion area in the groups of memory cell transistors.

REFERENCES:
patent: 5033023 (1991-07-01), Hsia et al.
patent: 5185718 (1993-02-01), Rinerson et al.
patent: 5267196 (1993-11-01), Talreja et al.
patent: 5291045 (1994-03-01), Atsumi
patent: 5398204 (1995-03-01), Maruyama

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