Non-volatile semiconductor memory that is based on a virtual...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185110, C365S185260

Reexamination Certificate

active

06914824

ABSTRACT:
A semiconductor memory that prevents a decrease in margin at read time. A bit line in a floating state between a drain in a memory cell to be read and a charged bit line is charged for a certain period of time.

REFERENCES:
patent: 6487124 (2002-11-01), Semi
patent: 6496414 (2002-12-01), Kasa et al.
patent: 6512692 (2003-01-01), Yamauchi et al.
patent: 11-110987 (1999-04-01), None

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