Static information storage and retrieval – Floating gate – Particular biasing
Patent
1994-05-02
1995-01-10
Clawson, Jr., Joseph E.
Static information storage and retrieval
Floating gate
Particular biasing
36518909, 365195, 365228, 36523003, 365233, 365236, G11C 1140
Patent
active
053813669
ABSTRACT:
A nonvolatile semiconductor memory device includes rewritable areas (M10, M20). A control circuit (110) controls a boosting circuit (2) and a writing circuit (10) such that a high voltage is generated from the boosting circuit, and data is written to the rewritable area designated by an address register/decoder (104) by means of the writing circuit. In response to an external signal which is at the "H" level, the control circuit allows writing of data to the rewritable areas (M10, M20) by means of the writing circuit (9). In response to an external signal which is at the "L" level, the control circuit prohibits rewriting of data in the rewritable area (M10), and allows rewriting of data in the rewritable area (M20). Therefore, even if the operation mode is erroneously set to the write mode because of unstable state of the power supply, data in the rewritable area is not destroyed.
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Asari Seiichiro
Kawauchi Koichi
Clawson Jr. Joseph E.
Mitsubishi Denki & Kabushiki Kaisha
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