Non-volatile semiconductor memory device using differential...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185090, C365S185230, C365S200000

Reexamination Certificate

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07064986

ABSTRACT:
In a non-volatile semiconductor memory device which differentially uses a start programming voltage during a programming operation mode in order to reduce a dispersion for the number of programming loops, the programming method includes previously storing a row address that indicates at least one specific word line among a plurality of word lines; and applying a start programming voltage to the specific word line, when a row address applied in a programming operation mode coincides with the stored row address, the start programming voltage having a level that is different from a level of start programming voltage to be applied to the rest word lines except the specific word line, whereby reducing dispersion for the programming loop number and realizing a high-speed programming operation and operating efficiency.

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Kang-Deog Suh, et al., “A 3.3 V 32 Mb Nand Flash Memory with Incremental Step Pulse Programming Scheme”, IEEE Journal of Solid-State Circuits, vol. 30, No. 11, Nov. 1995, 8 Pgs.

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