Non-volatile semiconductor memory device selectively skipping me

Static information storage and retrieval – Addressing – Plural blocks or banks

Patent

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Details

36518901, 36518907, 365201, G11C 700

Patent

active

052873269

ABSTRACT:
When an electrically erasable and programmable read only memory device enters a programming mode of operation, write-in data bits are sequentially compared with read-out data bits stored in the memory cells associated with the write-in data bits to see whether or not the write-in data bits are consistent with the read-out data bits, and the programming is carried out in case of inconsistence between the write-in data bits and the read-out data bits; however, if all of the write-in data bits are consistent with the read-out data bits, the write-in data bits are never written into the memory cells so that write-in/erasing characteristics are free from aged deterioration.

REFERENCES:
patent: 4763305 (1988-08-01), Kuo
patent: 4811294 (1989-03-01), Kobayashi et al.
patent: 4982379 (1991-01-01), Miyata
patent: 5164918 (1992-11-01), Ogino et al.
patent: 5172338 (1992-12-01), Mehrotra et al.

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