Static information storage and retrieval – Floating gate – Particular connection
Patent
1996-05-15
1998-05-12
Nelms, David C.
Static information storage and retrieval
Floating gate
Particular connection
36518518, 3651852, 36518524, G11C 700
Patent
active
057516340
ABSTRACT:
Memory cells each for storing 2-bit data are connected to a bit line. First and second flip-flop circuits are coupled to the bit line. The first flip-flop circuit holds the lower bit of 2-bit data read out from or written into the memory cell and the second flip-flop circuit holds the upper bit of 2-bit data read out from or written into the memory cell. At the data readout time, the upper bit is first read out from the memory cell and then the lower bit is read out from the memory cell. At the data writing time, the upper bit is first written into the memory cell and then the lower bit is written into the memory cell.
REFERENCES:
patent: 5088060 (1992-02-01), Endoh et al.
patent: 5379256 (1995-01-01), Tanaka et al.
patent: 5477495 (1995-12-01), Tanaka et al.
Kabushiki Kaisha Toshiba
Nelms David C.
Tran Michael T.
LandOfFree
Non-volatile semiconductor memory device for storing multivalue does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Non-volatile semiconductor memory device for storing multivalue , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile semiconductor memory device for storing multivalue will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-989469