Non-volatile semiconductor memory device and method of manufactu

Details Non-volatile semiconductor memory device and method of manufactu Non-volatile semiconductor memory device and method of manufactu

1998-05-06

1999-09-28

Nelms, David

Static information storage and retrieval

Floating gate

Particular connection

257316, 257508, G11C 1604

Patent

active

059598883

ABSTRACT:
The non-volatile semiconductor device includes a sub control gate in addition to the conventional structure having a control gate and a floating gate. When writing or erasing is performed, by applying various to the control gate and the sub control gate, the potential of the floating gate which is capacitively connected to the control and sub control gates is determined. Accordingly, the floating gate voltage is maintained at lower control voltage compared to conventional one by selecting larger coupling ratio. The sub control gate covering a part where charge concentration apt to occur avoids charge concentration and deterioration of the tunnel oxide film.

REFERENCES:
patent: 5557565 (1996-09-01), Kaya et al.
W.C. Shin et al., "A New Shared Bit Line NAND Cell Technology for the 256 Mb Flash Memory with 12V Programming", 1996 IEDM.
J.D. Choi, et al., "A Novel Booster Plate Technology in High Density NAND Flash Memories for Voltage Scaling-Down and Zero Program Disturbance", 1996 Symposium on VLSI Technology Digest of Technical Papers, pp. 238-239.

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