Non-volatile semiconductor memory device and method of manufactu

Details Non-volatile semiconductor memory device and method of manufactu Non-volatile semiconductor memory device and method of manufactu

1995-05-12

1997-03-11

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular connection

36518501, 36518518, 36518533, G11C 1134

Patent

active

056108583

ABSTRACT:
Memory cells, each formed of an EEPROM, are series-connected with transistors. Blocks, each of which is constructed by one memory cell and one transistor connected in series, are arranged in a matrix form. The memory cell and transistor of each block are controlled by different row lines. The memory cell and transistor of each block are connected to different column lines, and the column line connected to the memory cell of one of the adjacent blocks which are controlled by the same row line is connected to the transistor of the other block.

REFERENCES:
patent: 4173766 (1979-11-01), Hayes
patent: 4794564 (1988-12-01), Watanabe
patent: 5274587 (1993-12-01), Koyama
patent: 5278439 (1994-01-01), Ma et al.
patent: 5473564 (1995-12-01), Kowalski

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