Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2000-02-25
2002-04-30
Nguyen, Viet Q. (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185180, C365S185190, C365S185240, C365S185010, C365S185220, C365S185260
Reexamination Certificate
active
06381178
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a non-volatile semiconductor memory device and a method of rewriting data stored in a non-volatile semiconductor memory device.
2. Description of the Related Art
FIG. 1
illustrates a structure of a conventional non-volatile memory cell having a floating gate electrode.
The illustrated non-volatile memory cell is comprised of a p-type semiconductor substrate
1
, a first gate insulating film
4
formed on the p-type semiconductor substrate
1
, a floating gate electrode
5
formed on the first gate insulating film
4
and composed of first polysilicon, a second gate insulating film
6
formed on the floating gate electrode
5
and having a three-layered structure of ONO (Oxide-Nitride-Oxide), and a control gate electrode
7
formed on the second gate insulating film
6
and composed of second polysilicon.
A source
2
and a drain
3
both comprised of a n
+
diffusion layer is formed at a surface of the p-type semiconductor substrate
1
at opposite sides of the duplex gates
5
and
7
.
An electric power supply
8
applies a voltage across the control gate electrode
7
and the p-type semiconductor substrate
1
.
For instance, Japanese Unexamined Patent Publications Nos. 7-73688, 7-312093 and 7-326196, and Japanese Patent Publication No. 2645122 (Japanese Unexamined Patent Publication No. 2-193398) have suggested a method of deleting data stored in such a non-volatile memory cell as illustrated in FIG.
1
. In accordance with the suggested method, a gradually increasing voltage is applied across the control gate electrode
7
and the p-type semiconductor substrate
1
.
Hereinbelow is explained the method with reference to
FIGS. 2 and 3
.
In the above-mentioned method of deleting data stored in a non-volatile memory cell, a voltage which is negative relative to the p-type semiconductor substrate
1
is applied to the control gate electrode
7
to thereby discharge electrons accumulated in the floating gate electrode
5
, into the p-type semiconductor substrate
1
. Such discharge of electrons is called Fowler-Nordheim tunnel discharge (hereinafter, referred to simply as “FN tunnel discharge”).
In the method, pulses are applied at a voltage V
1
to the control gate electrode
7
a predetermined number of times, when data starts being deleted, as illustrated in FIG.
2
.
If data cannot be deleted even by applying the pulses at a voltage V
1
to the control gate electrode
7
, pulses are applied at a voltage V
2
to the control gate electrode
7
, as illustrated in FIG.
2
. Herein, a voltage V
2
is higher than a voltage V
1
by a predetermined increment &Dgr;V
1
(V
2
=V
1
+&Dgr;V
1
).
If data cannot be deleted even by applying the pulses at a voltage V
2
to the control gate electrode
7
, pulses are applied at a voltage V
3
to the control gate electrode
7
, as illustrated in FIG.
2
. Herein, a voltage V
3
is higher than a voltage VS by a predetermined increment &Dgr;V
1
(V
3
=V
2
+&Dgr;V
1
).
Thereafter, a voltage applied to the control gate electrode
7
is gradually increased by a predetermined increment &Dgr;V
1
, until data stored in the non-volatile memory cell is completely deleted.
A voltage to be applied to the control gate electrode
7
is gradually increased in the following two manners.
Firstly, a voltage increment &Dgr;V
1
is determined to be relatively high, and a step time &Dgr;t
1
during which a voltage applied to the control gate electrode
7
is kept constant is determined to be relatively short, as shown with a solid line in FIG.
2
.
Secondly, a voltage increment &Dgr;V
2
is determined to be relatively small, and a step time &Dgr;t
2
during which a voltage applied to the control gate electrode
7
is kept constant is determined to be relatively long, as shown with a broken line in FIG.
2
.
When the voltage increment &Dgr;V
1
is determined to be relatively high, and the step time &Dgr;t
1
is determined to be relatively short, as shown with the solid line in
FIG. 2
, it would be possible hasten deleting data to a desired degree. However, if the voltage is increased just before data is deleted to a desired degree, data is over-deleted more than necessary, because a voltage increment is higher than the voltage increment &Dgr;V
1
, and hence, a level of deletion of data is over a desired level of deletion of data after the voltage has been increased, as shown with a solid line
9
in FIG.
3
.
In contrast, when the voltage increment &Dgr;V
2
is determined to be relatively small, and the step time &Dgr;t
2
is determined to be relatively long, as shown with a broken line in
FIG. 2
, it would be possible to prevent data from being over-deleted in such a way as mentioned above. However, since the voltage increment &Dgr;V
2
is smaller than the voltage increment &Dgr;V
1
, data is deleted at a lower rate, which means that it would take longer time to delete data to a desired degree, as shown with a broken line
10
in FIG.
3
.
SUMMARY OF THE INVENTION
In view of the above-mentioned problem in the conventional non-volatile semiconductor memory device, it is an object of the present invention to provide a non-volatile semiconductor memory device which is capable of increasing a rate at which data is deleted without over-deletion of data.
It is also an object of the present invention to provide a method of deleting data stored in a non-volatile semiconductor memory device, which method is capable of doing the same.
In one aspect of the present invention, there is provided a non-volatile semiconductor memory device, including (a) a first gate insulating film formed on a channel region of a semiconductor substrate, (b) a floating gate electrode formed on the first gate insulating film, (c) a second gate insulating film formed on the floating gate electrode, (d) a control gate electrode formed on the second gate insulating film, and (e) an electric power source applying a gradually increasing voltage across the control gate electrode and the semiconductor substrate, the electric power source varying both an increment by which the voltage is increased and a period of time during which the voltage is kept applied, while data is being rewritten.
The electric power source may vary both the increment and the period of time at a predetermined time, in which case, it is preferable that the electric power source applies such a voltage that a first increment is smaller than a second increment and that a first period of time is longer than a second period of time. The first increment is defined as an increment by which the voltage is increased after the predetermined time, the second increment is defined as an increment by which the voltage is increased prior to the predetermined time, the first period of time is defined as a period of time during which the voltage is kept constant after the predetermined time, and the second period of time is defined as a period of time during which the voltage is kept constant prior to the predetermined time.
The electric power source may vary both the increment and the period of time at each of a plurality of predetermined times, in which case, it is preferable that the electric power source applies such a voltage that a first increment is smaller than a second increment and that a first period of time is longer than a second period of time, the first increment being defined as an increment by which the voltage is increased after the each of a plurality of predetermined times, the second increment being defined as an increment by which the voltage is increased prior to the each of a plurality of predetermined times, the first period of time being defined as a period of time during which the voltage is kept constant after the each of a plurality of predetermined times, and the second period of time being defined as a period of time during which the voltage is kept constant prior to the each of a plurality of predetermined times.
In another aspect of the present invention, there is provided a method of rewriting data stored
McGinn & Gibb PLLC
NEC Corporation
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