Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent
1994-10-20
1996-08-13
Fears, Terrell W.
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
36523001, G11C 1300
Patent
active
055463517
ABSTRACT:
The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite operation, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.
REFERENCES:
patent: 4279024 (1981-07-01), Schrenk
patent: 4831591 (1989-05-01), Imazeki
patent: 5126973 (1992-06-01), Garcia
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5233610 (1993-08-01), Nakayama
Aritome Seiichi
Asano Masamichi
Itoh Yasuo
Iwata Yoshihisa
Kato Hideo
Fears Terrell W.
Kabushiki Kaisha Toshiba
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