Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2005-11-22
2005-11-22
Le, Vu A. (Department: 2824)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S185110
Reexamination Certificate
active
06967892
ABSTRACT:
The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite oepration, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.
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Japanese Office Action issued Jun. 3, 2005.
Aritome Seiichi
Asano Masamichi
Itoh Yasuo
Iwata Yoshihisa
Kato Hideo
Kabushiki Kaisha Toshiba
Le Vu A.
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