Non-volatile semiconductor memory device and controlling...

Details Non-volatile semiconductor memory device and controlling... Non-volatile semiconductor memory device and controlling...

2005-09-20

2005-09-20

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S230060, C365S189011

Reexamination Certificate

active

06947325

ABSTRACT:
This invention largely reduces a data writing time of a non-volatile semiconductor memory device. A memory array is split into a first memory cell array to be programmed with normal data in its memory cells and a second memory cell array to be programmed with inverted data of the normal data in its memory cells. A column decoder selects a bit line connected with the memory cell written with the normal data and a bit line connected with the memory cell written with the inverted data simultaneously. A differential amplifier amplifies a difference between signals outputted to the pair of these bit lines and outputs it to an I/O line.

REFERENCES:
patent: 5748534 (1998-05-01), Dunlap et al.
patent: 6285589 (2001-09-01), Kajitani

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