Non-volatile semiconductor memory device

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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Details

C365S185110, C365S230060, C365S051000, C365S200000, C365S185170

Reexamination Certificate

active

07965552

ABSTRACT:
A non-volatile semiconductor memory device includes: a memory cell array; a bad block position data register area defined in the memory cell array to store bad block position data; an address decoder circuit configured to select a block in the cell array; and bad block flag latches disposed in the address decoder circuit, bad block flags being set in the bad block flag latches in accordance with the bad block position data read out the bad block position data register area, wherein the bad block position data in the bad block position data register area are defined by such a bit position assignment scheme that one bit is assigned to one block under the condition that block positions in the cell array and column positions in one page are set in one-to-one correspondence.

REFERENCES:
patent: 5848009 (1998-12-01), Lee et al.
patent: 7388782 (2008-06-01), Tokiwa
patent: 7466600 (2008-12-01), Roohparvar
patent: 2001-273798 (2001-10-01), None

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