Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2011-03-22
2011-03-22
Zarabian, Amir (Department: 2827)
Static information storage and retrieval
Floating gate
Particular connection
Reexamination Certificate
active
07911845
ABSTRACT:
A non-volatile semiconductor memory device includes: a memory cell array having electrically rewritable and non-volatile memory cells arranged; a data register circuit configured to hold write data to be written into the memory cell array; and an address decode circuit configured to decode a write address signal and control the write data-loading in the data register circuit, the address decode circuit being settable in such a multiple selection mode that the same write data is loaded in multiple registers in the data register circuit in correspondence to multiple addresses.
REFERENCES:
patent: 6323681 (2001-11-01), Iwanczuk et al.
patent: 2002/0194546 (2002-12-01), Ooishi
patent: 2004/0095809 (2004-05-01), Sakamoto et al.
patent: 2007-250187 (2007-09-01), None
Shirakawa Masanobu
Tokiwa Naoya
Kabushiki Kaisha Toshiba
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
Tran Anthan T
Zarabian Amir
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