Non-volatile semiconductor memory device

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357 59, H01L 2978, H01L 2904

Patent

active

046724087

ABSTRACT:
A non-volatile memory device which stores data by capturing charges in an amorphous semiconductor layer. The amorphous semiconductor layer is provided between a gate electrode and a semiconductor substrate via an insulating film and its edge is in contact with at least the one of the source or drain electrodes in the semiconductor substrate. When a high voltage (10 V or higher) is applied to the gate electrode, an electric field is generated and thereby charges are injected into the amorphous semiconductor layer from the source and/or drain electrode and a write operation is thus carried out. An erasing operation is carried out by injection of charges of inverse polarity. This memory device offers advantages of low operating voltage and excellent charge sustaining characteristic, resulting from the fact that the write operation is attained independently of the gate insulating film.

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patent: 4012762 (1977-03-01), Abe et al.
patent: 4062039 (1977-12-01), Nishimura

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