Static information storage and retrieval – Floating gate – Particular biasing
Patent
1995-12-29
1998-04-28
Popek, Joseph A.
Static information storage and retrieval
Floating gate
Particular biasing
36518518, 257315, G11C 1134
Patent
active
057454167
ABSTRACT:
A non-volatile semiconductor memory which is capable of high speed and highly accurate analog data writing. The memory includes a first MOS type transistor having a first floating gate which is electrically isolated. A first electrode is capacitively coupled with the first floating gate. A second electrode is connected via a tunnel junction with the first floating gate. A third electrode is capacitively coupled with the second electrode. A second MOS type transistor interconnects the first and second electrodes. A means is provided for applying a predetermined potential difference between the first and third electrodes to thereby cause a tunnel current to flow in the tunnel junction and to store an electric charge in the first floating gate to thereby cause the second MOS type transistor to conduct when the electric charge has reached a predetermined value.
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patent: 4780750 (1988-10-01), Nolan et al.
patent: 4802124 (1989-01-01), O'Brien, Jr.
patent: 5081610 (1992-01-01), Olivo et al.
Ohmi Tadahiro
Shibata Tadashi
Yamashita Yuichiro
Ohmi Tadahiro
Popek Joseph A.
Shibata Tadashi
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