Non-volatile semiconductor memory device

Static information storage and retrieval – Magnetic bubbles – Guide structure

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357 54, 365182, H01L 2978, H01L 2934

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active

040578216

ABSTRACT:
An improved MNOS IGFET with stable long term memory retention, hysteresis and capable of LSI fabrication with reproducible electrical characteristics. The device comprises a field oxide adhered to a semiconductive substrate of a first conductivity type having a spaced pair of diffusion regions of opposite conductivity type separated by an interstitial layer of the substrate; a composite dielectric layer adhered to the oxide layer, the composite layer comprising a first dielectric layer adhered directly to the oxide layer and a second dielectric layer adhered to the first dielectric layer; and a conductive electrode adhered to the second dielectric layer.
The first dielectric layer has a thickness in the range from about 20% to about 50% of the total thickness of the composite dielectric layer, and the electrical conductivity of the second dielectric layer is less than that of the first dielectric layer.
The first dielectric layer is formed by a nitrogen carrier gas diffusion step performed at a temperature in the range from about 650.degree. to about 850.degree. C; the second dielectric layer is formed by a hydrogen carrier gas diffusion step performed at a temperature in the range from about 900.degree. to about 1150.degree. C.

REFERENCES:
patent: 3649884 (1972-03-01), Haneta
patent: 3719866 (1973-03-01), Naber et al.
patent: 3793090 (1974-02-01), Barile et al.
patent: 3821566 (1974-06-01), Cricchi
patent: 3845327 (1974-10-01), Cricchi
patent: 3846768 (1974-11-01), Krick
patent: 3853496 (1974-12-01), Kim
patent: 3859642 (1975-01-01), Mar
patent: 3906296 (1975-09-01), Maserjian
patent: 3925804 (1975-12-01), Cricchi et al.
Metal-Insulator-Trap-Oxide-Semiconductor Memory Cell; by Augsta et al., IBM Technical Disclosure Bulletin, vol. 13, No. 12, May 1971, p. 3636.

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