Non-volatile semiconductor memory device

Static information storage and retrieval – Floating gate – Particular connection

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Details

36518505, 36518507, G11C 700

Patent

active

058986146

ABSTRACT:
A non-volatile semiconductor memory device comprises a plurality of memory cells each including a semiconductor substrate of a first conductivity type having a main surface region, a control gate portion formed in said main surface region of the semiconductor substrate and consisting of an impurity diffusion region of a second conductivity type opposite to said first conductivity type, a reading transistor portion formed on the main surface region of the substrate and consisting of a MOS type transistor structure, and a floating gate portion formed over the control gate portion and the reading transistor portion. These memory cells differ from each other in an overlapping area ratio Ap/An, where An denotes an area of an over-lapping portion between the floating gate and the impurity diffusion region of the control gate portion, Ap represents an area of an overlapping portion between the floating gate and an active region of the reading transistor portion.

REFERENCES:
patent: 4649520 (1987-03-01), Eitan
patent: 4661833 (1987-04-01), Mitzutani
patent: 5465231 (1995-11-01), Ohsaki
patent: 5622881 (1997-04-01), Acocella et al.

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