Non-volatile semiconductor memory device

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185300

Reexamination Certificate

active

11321865

ABSTRACT:
A non-volatile semiconductor memory device comprises a semiconductor substrate; a cell well formed in the semiconductor substrate; a first sub cell array including part of a cell array of NAND cells arranged in array in the cell well; a second sub cell array including the remainder of the cell array and arranged in the same cell well as that for the first sub cell array; a first sense amp corresponding to the first sub cell array; a second sense amp corresponding to the second sub cell array; a first bit line group including one of portions of a bit line group divided on the way extending from the first sense amp to the second sense amp and corresponding to the first sub cell array; and a second bit line group including the other of the portions of the bit line group divided on the way and corresponding to the second sub cell array.

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patent: 6147911 (2000-11-01), Takeuchi et al.
patent: 6307785 (2001-10-01), Takeuchi et al.
patent: 6373746 (2002-04-01), Takeuchi et al.
patent: 6490210 (2002-12-01), Takase et al.

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