Non volatile semiconductor memory device

Details Non volatile semiconductor memory device Non volatile semiconductor memory device

2007-05-01

2007-05-01

Tran, Michael (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S233100

Reexamination Certificate

active

11272832

ABSTRACT:
In a nonvolatile semiconductor memory device, the increase of the capacity of a nonvolatile semiconductor memory inevitably causes the power supply circuits including the charge pump circuits at the periphery to increase. In view of the above situation, the object of the present invention is to provide a technology of allowing a nonvolatile semiconductor memory to increase the capacity without increasing the power supply circuits which are the peripheral circuits of the nonvolatile semiconductor memory. It is possible to carry out the erase and write of plural memory cell blocks by selecting memory cell blocks one by one in a power supply circuit containing a charge pump circuit having the capability of carrying out the erase and write of a memory cell block and it is also possible, at the time of read and standby, to increase the charge pump capability and select plural memory cell blocks by inputting clock signals having a frequency not less than the frequency of the clock signals at the time of the operations of erase and write to charge pumps.

REFERENCES:
patent: 5818766 (1998-10-01), Song
patent: 6147525 (2000-11-01), Mitani et al.
patent: 2006/0006925 (2006-01-01), Yamazoe et al.
patent: 61-077197 (1984-09-01), None
patent: 2005-267734 (2004-03-01), None
Toru Tanzawa et al., “A Dynamic Analysis of the Dickson Charge Pump Circuit”, IEEE Journal of Solid-State Circuits, vol. 32, No. 8, Aug. 1997, pp. 1231-1240.

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