Non-volatile semiconductor memory device

Details Non-volatile semiconductor memory device Non-volatile semiconductor memory device

2006-10-17

2006-10-17

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Floating gate

Multiple values

C365S210130

Reexamination Certificate

active

07123510

ABSTRACT:
A plurality of memory cells are connected between two adjacent sub-bit lines. A row decoder3selects a word line connected to a memory cell to be read. A selection line selection circuit2and a column selection circuit5include first and second selection portions that perform selection operations simultaneously and independently. The first selection portion selects a first pair of main bit lines and selection lines in order to select the memory cell to be read. The second selection portion selects a second pair of main bit lines that is different from the first pair of main bit lines and selection lines for selecting a sector different from that for the memory cell to be read in order to select a line to be used for reading a reference voltage.

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