Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2005-08-09
2005-08-09
Mai, Son (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185110, C365S185280, C365S185290
Reexamination Certificate
active
06928002
ABSTRACT:
A non-volatile semiconductor memory device comprises a plurality of blocks each having a plurality of memory cells to be erased at a time and a decoder for selecting the memory cells, each of the blocks having a block decoder for latching a selection signal thereof in pre-programming and for selecting all of the latched blocks by the selection signal at the same time, a sense amplifier, and an address control circuit for controlling a sequence, the sequence including counting addresses of the memory cells in erasing and erasing all of the selected memory cells after pre-programming, all of the blocks having the latched selection signal being controlled to be collectively erased by the address control circuit.
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Hara Tokumasa
Shiga Hitoshi
Taura Tadayuki
Hogan & Hartson LLP
Kabushiki Kaisha Toshiba
Mai Son
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