Non-volatile semiconductor memory device

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185110, C365S185200

Reexamination Certificate

active

06868008

ABSTRACT:
A non-volatile semiconductor device in which the number of redundant cells is not increased in proportion to the number of simultaneously accessed bits, having a redundant cell layout which prevents an increase in access time. This non-volatile semiconductor memory device has a regular cell array in which a plurality of memory cells are arranged. The regular cell array is divided into N sector regions in the row direction. Each of the N sector regions is divided into n first memory blocks in the row direction. One of the n first memory blocks is a redundant memory block. The (n−1) first memory blocks correspond to (n−1) input/output terminals.

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