Non-volatile semiconductor memory cell

Static information storage and retrieval – Floating gate – Particular biasing

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Details

365218, 257321, 257316, G11C 1134, G11C 700

Patent

active

053734653

ABSTRACT:
Disclosed is a flash EEPROM cell needing only a 5 volt external source using an on-chip voltage multiplier circuit to provide high voltages necessary to effect Fowler-Nordheim tunneling during both the program and erase modes. Properties of dielectric layers between a floating gate and a control gate and between the floating gate and a drain region differ to facilitate programming and erasing of the floating gate. Also disclosed is a method for producing a flash EEPROM cell by forming the insulative layer between a floating gate and a control gate to have a capacitance lower than the capacitance of the insulating layer between the floating gate and a drain region.

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