Non-volatile semiconductor memory cell

Details Non-volatile semiconductor memory cell Non-volatile semiconductor memory cell

1996-03-25

1998-04-07

Hoang, Huan

Static information storage and retrieval

Floating gate

36518518, 36518529, 257315, G11C 1134

Patent

active

057372640

ABSTRACT:
A non-volatile semiconductor memory cell comprises a source region having an N.sup.+ type diffusion layer, an N.sup.- diffusion layer, and N type diffusion layer, the N.sup.- type diffusion layer being formed by injecting phosphorus ions by an inclined rotating ion injecting method. The overlap width of the N.sup.- type diffusion layer and the floating gate electrode is larger than the overlap width of the N.sup.+ type diffusion layer and the floating gate electrode, and the junction depth of the N type diffusion layer is larger than the junction depth of the N.sup.+ type diffusion layer. Thus, in flash memory having memory cells according to the present invention, even if the size of the memory cells is reduced, erase time can be shortened without sacrificing erase function and performance.

REFERENCES:
patent: 4835740 (1989-05-01), Sato
patent: 4868619 (1989-09-01), Mukherjee et al.
patent: 5345104 (1994-09-01), Prall et al.
patent: 5446298 (1995-08-01), Kojima
patent: 5491657 (1996-02-01), Haddad et al.
patent: 5574685 (1996-11-01), Hsu
"Process and Device Technologies For 16Mbit EPROMs with Large-Tilt-Angle Implanted P-Pocket Cell" Ohshima et al; 1990; IEEE; pp. 95-98.

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