Static information storage and retrieval – Floating gate – Multiple values
Patent
1999-06-01
2000-09-19
Tran, Andrew Q.
Static information storage and retrieval
Floating gate
Multiple values
36518512, 36518517, 36518518, 36518522, 36518509, G11C 1604
Patent
active
061221937
ABSTRACT:
Data latch circuits are provided corresponding to select memory cells from or into which read or program is executed. The data latch circuits are grouped by two into sets. When 2-bit data is read from or programmed into the select memory cells, one data latch circuit is selected by a select signal, and, when 1-bit data is read or programmed, the two data latch circuits in one set are selected by a select signal. Between one or two selected data latch circuits and a data input/output buffer, data is exchanged. By so doing, changeover between 2-level data and multi-level (4-level or more-level) data concerning program or read of data into or out the memory cells becomes possible.
REFERENCES:
patent: 5515317 (1996-05-01), Wells et al.
patent: 5838612 (1998-11-01), Calligaro et al.
patent: 5910914 (1999-06-01), Wang
Fujimura Susumu
Nakai Hiroto
Shibata Noboru
Tanaka Tomoharu
Yamamura Toshio
Kabushiki Kaisha Toshiba
Tran Andrew Q.
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