Non-volatile semiconductor memory and method of operating...

Static information storage and retrieval – Format or disposition of elements

Reexamination Certificate

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C365S063000

Reexamination Certificate

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06894913

ABSTRACT:
A method of writing data into a non-volatile semiconductor memory having a plurality of memory cells in which a word line is shared by memory cells and a bit line is shared by adjacent memory cells, the method including writing the data into memory cells connected to the same word line sequentially from a memory cell at one end to a memory cell at another end.

REFERENCES:
patent: 4267632 (1981-05-01), Shappir
patent: 20030124803 (2003-07-01), Ueda et al.
patent: 20040109355 (2004-06-01), Yamauchi
patent: 1-130570 (1989-05-01), None
patent: 6-181298 (1994-06-01), None
Kume et al; A 1.28m2 Contactless Memory Cell Technology for a 3V-Only 64Mbit EEPROM; IEDM 92, pp. 991-993, 1992.

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