Non-volatile semiconductor memory

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S189090

Reexamination Certificate

active

11181387

ABSTRACT:
A method for determining a reading voltage for reading data out of a non-volatile semiconductor memory, wherein the semiconductor memory comprises a plurality of memory cells grouped in a first memory area and a second memory area. A given number of “0”s are stored into the second memory area, and an equal number of “0”s and “1”s are stored in the memory cells of the first memory area. The memory cells of the first memory area are read using an initial first reading voltage. The first reading voltage is adjusted and the memory cells of the first memory area are re-read until an equal number of “0”s and “1”s are read out of the memory cells of the first memory area, to thereby obtain a final first reading voltage. An initial second reading voltage is determined on the basis of the final first reading voltage. The memory cells of the second memory area are read using the initial second reading voltage. The second reading voltage is adjusted and the memory cells of the second memory area are re-read until the number of “0”s read is equal to the number of “0”s stored in the second memory area, thereby obtaining a final second reading voltage. The final second reading voltage is used as a reading voltage for reading the memory cells of the semiconductor memory.

REFERENCES:
patent: 5790453 (1998-08-01), Chevallier
patent: 5870333 (1999-02-01), Matsumoto
patent: 6363015 (2002-03-01), Barcella et al.
patent: 6674666 (2004-01-01), Maone et al.

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