Non-volatile semiconductor memory

Static information storage and retrieval – Floating gate – Particular biasing

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365189, 365 51, 357 235, G11C 1140

Patent

active

046226567

ABSTRACT:
This invention relates to the reduction of programming voltage in a non-volatile memory of the type having a double gate structure composed of a select-gate and a floating-gate. A channel region under the select-gate is highly doped and a channel region under the floating gate is lightly doped or doped to opposite conductivity type. Due to the different doping concentrations between these two channel regions, a large and steep surface potential gap appears at the transition region between the select-gate and the floating-gate in the programming operation thereby reducing the programming voltage.

REFERENCES:
patent: 4305083 (1981-12-01), Gutierrez
patent: 4513397 (1985-04-01), Ipri et al.

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