Static information storage and retrieval – Floating gate
Reexamination Certificate
2006-09-26
2006-09-26
Nguyen, Tuan T. (Department: 2824)
Static information storage and retrieval
Floating gate
C365S177000, C365S163000
Reexamination Certificate
active
07113426
ABSTRACT:
Non-Volatile RAM Cell and Array using Nanotube Switch Position for Information State. A non-volatile memory array includes a plurality of memory cells, each cell receiving a bit line, word line, and release line. Each memory cell includes a cell selection transistor with first, second and third nodes. The first and second nodes are in respective electrical communication with the bit line and the word line. Each cell further includes an electromechanically deflectable switch, having a first, second and third node. The first node is in electrical communication with the release line, and a third node is in electrical communication with the third node of the cell selection transistor. The electromechanically deflectable switch includes a nanotube switching element physically positioned between the first and third nodes of the switch and in electrical communication with the second node of the switch. The second node of the switch is in communication with a reference signal. Each nanotube switching element is deflectable into contact with the third node of the switch in response to signals at the first and second node of the cell selection transistor and is releasable from such contact in response to a signal at the release line. In preferred embodiments, the cell selection transistor is a FET and the second node of the transistor is a gate of the FET.
REFERENCES:
patent: 3448302 (1969-06-01), Shanfield
patent: 4845533 (1989-07-01), Pryor et al.
patent: 4876667 (1989-10-01), Ross et al.
patent: 6044008 (2000-03-01), Choi
patent: 6128214 (2000-10-01), Kuekes et al.
patent: 6159620 (2000-12-01), Heath et al.
patent: 6183714 (2001-02-01), Smalley et al.
patent: 6198655 (2001-03-01), Heath et al.
patent: 6221330 (2001-04-01), Moy et al.
patent: 6232706 (2001-05-01), Dai et al.
patent: 6445006 (2002-09-01), Brandes et al.
patent: 6518156 (2003-02-01), Chen et al.
patent: 6548841 (2003-04-01), Frazier et al.
patent: 6559468 (2003-05-01), Kuekes et al.
patent: 6574130 (2003-06-01), Segal et al.
patent: 6643165 (2003-11-01), Segal et al.
patent: 6673424 (2004-01-01), Lindsay et al.
patent: 6706402 (2004-03-01), Rueckes et al.
patent: 6750471 (2004-06-01), Bethune et al.
patent: 6759693 (2004-07-01), Vogeli et al.
patent: 6774052 (2004-08-01), Vogeli et al.
patent: 6781166 (2004-08-01), Lieber et al.
patent: 6784028 (2004-08-01), Rueckes et al.
patent: 6803840 (2004-10-01), Hunt et al.
patent: 6809465 (2004-10-01), Jin
patent: 2002/0130311 (2002-09-01), Lieber et al.
patent: 2002/0130353 (2002-09-01), Lieber et al.
patent: 2002/0172963 (2002-11-01), Kelley et al.
patent: 2002/0179434 (2002-12-01), Dai et al.
patent: 2003/0021966 (2003-01-01), Segal et al.
patent: 2003/0042834 (2003-03-01), Dean et al.
patent: 2003/0124325 (2003-07-01), Rueckes et al.
patent: 2003/0165074 (2003-09-01), Segal et al.
patent: 2003/0234407 (2003-12-01), Vogeli et al.
patent: 2003/0236000 (2003-12-01), Vogeli et al.
patent: 2004/0085805 (2004-05-01), Segal et al.
patent: 2004/0159833 (2004-08-01), Rueckes et al.
patent: 2004/0164289 (2004-08-01), Rueckes et al.
patent: 2004/0175856 (2004-09-01), Jaiprakash et al.
patent: 2004/0181630 (2004-09-01), Jaiprakash et al.
patent: 2004/0191978 (2004-09-01), Rueckes et al.
patent: 2004/0214366 (2004-10-01), Segal et al.
patent: 2004/0214367 (2004-10-01), Segal et al.
patent: 2005/0041465 (2005-02-01), Rueckes et al.
patent: 2005/0047244 (2005-03-01), Rueckes et al.
patent: 2005/0056877 (2005-03-01), Rueckes et al.
patent: WO 01/03208 (2001-01-01), None
patent: WO 01/44796 (2001-06-01), None
patent: WO 04/065657 (2004-08-01), None
Choi, W. B. et al., “Carbon-nanotube-based nonvolatile memory with oxide-nitride-film and nanoscale channel.”Appl. Phys. Lett.,2003, vol. 82(2) 275-277.
Dequesnes, M. et al., “Calculation of pull-in voltages for carbon-nanotube-based nanoelectromechanical switches.”Nanotechnology,2002, vol. 13, 120-131.
Dequesnes, M. et al., “Simulation of carbon nanotube-based nanoelectromechanical switches.”Computational Nanoscience and Nanotechnology,2002, 383-386.
Wolf, S., Silicon Processing for the VLSI Era; vol. 2—Process Integration, Multi-Level-Interconnect Technology for VLSI and ULSI, 1990, Section 4.3 Materials for Multilevel Interconnect Technologies, pp. 189-191, Lattice Press, Sunset Beach.
Wolf, S., Silicon Processing for the VLSI Era; vol. 2—Process Integration, 1990, Section 4.7 Manufacturing Yield and Reliability Issues of VLSI Interconnects, pp. 260-273, Lattice Press, Sunset Beach.
Robinson, L.A.W., “Self-Aligned Electrodes for Suspended Carbon Nanotube Structures.”Microelectronic Engineering,2003, vols. 67-68. 615-622.
Tour, J. M. et al., “NanoCell Electronic Memories.”J. Am. Chem Soc.,2003, vol. 125, 13279-13283.
Rueckes, T., et al., “Carbon Nanotube-Based Nonvolatile Random Access Memory for Molecular Computing”Science,2000, vol. 289, 94-97.
Fan, S. et al., “Carbon nanotube arrays on silicon substrates and their possible application.”Physica E,2000, vol. 8, 179-183.
Zhan, W. et al., “Microelectrochemical Logic Circuits.”J. Am. Chem. Soc.,2003, vol. 125, 9934-9935.
Soh, H. T. et al., “Integrated nanotube circuits: Controlled growth and ohmic contacting of single-walled carbon nanotubes.”Appl. Phys. Lett.,1999, vol. 75(5) 627-629.
Kinaret, J.M. et al., “A carbon-nanotube-based nanorelay”,Appl. Phys. Lett.,2003, vol. 82(8) 1287-1289.
Franklin, N. R. et al., “Integration of suspended carbon nanotube arrays into electronic devices and electromechanical systems.”Appl. Phys. Lett.,2002, vol. 81(5) 913-915.
Avouris, P., “Carbon nanotube electronics,” Chem. Physics, 2002, vol. 281, pp. 429-445.
Dai, H. et al., “Controlled Chemical Routes to Nanotube Architectures, Physics, and Devices.”J. Phys. Chem . B,1999, vol. 103, 111246-11255.
Homma, Y. et al., “Growth of Suspended Carbon Nanotubes Networks on 100-nm-scale Silicon Pillars.”Appl. Phys. Lett.,2002, vol. 81(12) 2261-2263.
Ajayan, P.M., et al., “Nanometre-size tubes of carbon.”Rep. Prog. Phys.,1997, vol. 60, 1025-1062.
Sreekumar, T.V., et al., “Single-wall Carbon Nanotube Films”,Chem. Mater. 2003,vol. 15, 175-178.
Verissimo-Alves, M. et al., “Electromechanical effects in carbon nanotubes:Ab initioand analytical tight-binding calculations.”Phys. Rev. B,2003, vol. 67, 161401-1-161401-4.
Fuhrer, M.S. et al., “High-Mobility Nanotube Transistor Memory.”Nano Letters,2002, vol. 2(7) 755-759.
Radosavljevic, M. et al., “Nonvolatile molecular memory elements based on ambipolar nanotube field effect transistors.”Nano Letters,2002, vol. 2(7) 761-764.
Farajian, A. A. et al., “Electronic transport through bent carbon nanotubes: Nanoelectromechanical sensors and switches.”Phys. Rev. B,200,. vol. 67, 205423-1-205423-6.
Fischer, J.E. et al., “Magnetically aligned single wall carbon nanotube films: Preferred orientation and anisotropic transport properties.”Journal of Appl. Phys.,2003, vol. 93(4) 2157-2163.
Lee, K.H. et al., “Control of growth orientation for carbon nanotubes.”Appl. Phys. Lett.,2003, 82 (3) 448-450.
Casavant, M.J. et al., “Neat macroscopic membranes of aligned carbon nanotubes.”Journal of Appl. Phys.,2003, vol. 93(4) 2153-2156.
Ami, S. et al., “Logic gates and memory cells based on single C60electromechanical transistors.”Nanotechnology,2001, vol. 12, 44-52.
Dehon, A., “Array-Based Architecture for FET-Based, Nanoscale Electronics.”IEEE Transactions on Nanotechnology,2003, vol. 2(1) 23-32.
Tans, S. et al., “Room-temperature transistor based on a single carbon nanotube,”Nature,1998, vol. 393, 49-52.
Cui, J.B. et al., “Carbon Nanotube Memory Devices of High Charge Storage Stability.”Appl. Phys. Lett.,2002, vol. 81(17) 3260-3262.
Bertin Claude L.
Brock Darren
Jaiprakash Venkatachalam C.
Rueckes Thomas
Segal Brent M.
Nantero Inc.
Nguyen Dang
Nguyen Tuan T.
LandOfFree
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