Non-volatile ram cell

Details Non-volatile ram cell Non-volatile ram cell

1978-11-17

1980-06-10

Hecker, Stuart N.

Static information storage and retrieval

Read only systems

With override

365154, 365185, 365228, G11C 1140

Patent

active

042076153

ABSTRACT:
A non-volatile MOS memory cell which includes a bistable (flip-flop) circuit with slightly imbalanced loads. An electrically programmable, floating gate device is coupled across a portion of one of the loads to permit selective shunting. When the cell is powered-down (such as at power failure), the floating gate is either charged or discharged as a function of the state of the flip-flop. When power is reapplied, the imbalance caused by the selective shunting forces the flip-flop to its previous state. The relatively small cell does not require resetting, and the stored information is returned in its true (non-complementary) form when the cell is reactivated.

REFERENCES:
patent: 3953839 (1976-04-01), Dennison et al.
patent: 3969708 (1976-07-01), Sonoda
patent: 4095281 (1978-06-01), Denes
patent: 4122541 (1978-10-01), Uchida
patent: 4128773 (1978-12-01), Troutman et al.
patent: 4132904 (1979-01-01), Harari

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