Static information storage and retrieval – Floating gate – Multiple values
Patent
1996-08-29
1998-06-02
Popek, Joseph A.
Static information storage and retrieval
Floating gate
Multiple values
36518518, G11C 1134
Patent
active
057611173
ABSTRACT:
Inputted digital data are held in a data register and converted to multi-state analog amount by a resistance dividing circuit and a decoder. A comparator compares an analog amount read from a non-volatile memory cell with a converted analog amount; and in accordance with this comparison result, a writing voltage is supplied to a memory cell. A first bias generating circuit is provided for generating two different types of bias voltages as this writing voltage, MOS transistors are inserted as respective switches to the bias voltage supply lines and writing voltages are switched by selectively ON/OFF-controlling one of the MOS transistors in accordance with the upper bit of the inputted digital data. As a result, unnecessary writing time can be eliminated, time required for executing writing can be reduced and circuit configuration can be simplified.
REFERENCES:
patent: 5583816 (1996-12-01), Harari
Hagiwara Akio
Nambu Nozomu
Uchino Takashi
Ho Hoai V.
Popek Joseph A.
Sanyo Electric Co,. Ltd.
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